The present invention generally relates to a manufacturing process for producing a multilayer semiconductor structure. The multilayer structure includes a substrate made of a first semiconductor material and a superficial thin layer made of a second semiconductor material wherein the two semiconductor materials have substantially different lattice parameters.
It is known to produce semiconductor structures that include a substrate made of a material such as silicon, and a superficial thin layer made of a material such as silicon-germanium (SiGe), or germanium (Ge). International Application WO2004/006327 relates to a process for producing a structure having a thin layer of semiconductor material from a wafer that includes a lattice parameter adaptation layer with an upper semiconductor layer having a first lattice parameter. This process includes growing a film on the upper layer of the adaptation layer, wherein the film is made of semiconductor material having a second nominal lattice parameter that is substantially different than the first lattice parameter. The film has a minimal thickness sufficient to strain the first lattice parameter of the upper layer of the underlying adaptation layer. The process also includes growing a relaxed layer on the film, the relaxed layer made of semiconductor material having a nominal lattice parameter substantially identical to the first lattice parameter, and removing at least a part of the wafer on the side of the adaptation layer relative to the relaxed layer. The removal process includes forming a zone of weakness on a side of the adaptation layer relative to the relaxed layer, and supplying energy to the zone of weakness to detach a structure from the wafer that includes the relaxed layer.
The described process uses a layer transfer technique (for example, of the SMART-CUT® type process or the ELTRAN® type process) to produce the desired wafer. The starting point of such a process is a wafer with a lattice parameter adaptation layer corresponding to a region of the wafer that has a surface layer of substantially relaxed material, without a large number of structural defects such as dislocations. A relaxed layer is understood to mean any semiconductor layer which has a non-strained crystallographic structure, that is, one which has a lattice parameter substantially identical to the nominal lattice parameter of the material making up the layer. Conversely, a strained layer is a semiconductor material layer wherein the crystallographic structure is strained by expansion or by compression during crystalline growth, such as epitaxy, which causes at least a lattice parameter to be substantially different than the nominal lattice parameter of the material.
The process described in International Application WO2004/006327 is an advantageous solution for fabricating multilayer structures. However, there is a need for obtaining improved results.